SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Hewlett-Packard Company
hp AlphaServer DS25 68/1000
SPECint2000 = 678    
SPECint_base2000 = 618    
SPEC license # 2 Tested by: HP Test date: Jul-2002 Hardware Avail: Aug-2002 Software Avail: Oct-2001
Benchmark Reference
Runtime Ratio Graph Scale
164.gzip 1400 303    462     299    468     164.gzip base result bar (462)
164.gzip peak result bar (468)
175.vpr 1400 262    533     260    538     175.vpr base result bar (533)
175.vpr peak result bar (538)
176.gcc 1100 157    699     141    778     176.gcc base result bar (699)
176.gcc peak result bar (778)
181.mcf 1800 319    565     242    744     181.mcf base result bar (565)
181.mcf peak result bar (744)
186.crafty 1000 123    815     123    815     186.crafty base result bar (815)
186.crafty peak result bar (815)
197.parser 1800 431    418     345    522     197.parser base result bar (418)
197.parser peak result bar (522)
252.eon 1300 164    793     159    815     252.eon base result bar (793)
252.eon peak result bar (815)
253.perlbmk 1800 311    578     287    627     253.perlbmk base result bar (578)
253.perlbmk peak result bar (627)
254.gap 1100 239    461     204    540     254.gap base result bar (461)
254.gap peak result bar (540)
255.vortex 1900 223    852     199    956     255.vortex base result bar (852)
255.vortex peak result bar (956)
256.bzip2 1500 225    666     212    709     256.bzip2 base result bar (666)
256.bzip2 peak result bar (709)
300.twolf 3000 380    789     372    807     300.twolf base result bar (789)
300.twolf peak result bar (807)
SPECint_base2000 618      
  SPECint2000 678      

Hardware Vendor: Hewlett-Packard Company
Model Name: hp AlphaServer DS25 68/1000
CPU: Alpha 21264C
CPU MHz: 1000
FPU: Integrated
CPU(s) enabled: 1 core, 1 chip, 1 core/chip
CPU(s) orderable: 1 to 2
Parallel: No
Primary Cache: 64KB(I)+64KB(D) on chip
Secondary Cache: 8MB off chip per CPU
L3 Cache: None
Other Cache: None
Memory: 8GB
Disk Subsystem: 18.2GB SCSI
Other Hardware: None
Operating System: Tru64 UNIX V5.1A
Compiler: Compaq C V6.4-215-46B7O
Program Analysis Tools V2.0
Spike V5.2 DTK (1.471.2.2 46B5P)
Compaq C++ V6.3-010-46B2F
File System: AdvFS
System State: Multi-user
Notes / Tuning Information
 Baseline C  : cc  -arch ev6 -fast +CFB ONESTEP 
          C++: cxx -arch ev6 -O2        ONESTEP 
   All but 252.eon: cc -g3 -arch ev6 ONESTEP
      164.gzip: -fast -O4 -non_shared +CFB 
       175.vpr: -fast -O4 -assume restricted_pointers +CFB 
       176.gcc: -fast -O4 -xtaso_short -all -ldensemalloc -none
                +CFB +IFB 
       181.mcf: -fast -xtaso_short +CFB +IFB +PFB
    186.crafty: same as base
    197.parser: -fast -O4 -xtaso_short -non_shared +CFB
       252.eon: cxx -arch ev6 -O2 -all -ldensemalloc -none 
   253.perlbmk: -fast -non_shared +CFB +IFB 
       254.gap: -fast -O4 -non_shared +CFB +IFB +PFB 
    255.vortex: -fast -non_shared +CFB +IFB
     256.bzip2: -fast -O4 -non_shared +CFB 
     300.twolf: -fast -O4 -assume restricted_pointers -all 
                -ldensemalloc -none +CFB +IFB

 Most benchmarks are built using one or more types of 
 profile-driven feedback.  The types used are designated
 by abbreviations in the notes:

 +CFB: Code generation is optimized by the compiler, using 
       feedback from a training run.  These commands are
       done before the first compile (in phase "fdo_pre0"):

            mkdir /tmp/pp
            rm -f /tmp/pp/${baseexe}*

       and these flags are added to the first and second compiles:

            PASS1_CFLAGS = -prof_gen_noopt -prof_dir /tmp/pp
            PASS2_CFLAGS = -prof_use       -prof_dir /tmp/pp
      (Peak builds use /tmp/pp above; base builds use /tmp/pb.)

 +IFB: Icache usage is improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These commands
       are used (in phase "fdo_postN"):  

            mv ${baseexe} oldexe
            spike oldexe -feedback oldexe -o ${baseexe}

 +PFB: Prefetches are improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These
       commands are used (in phase "fdo_post_makeN"):

            rm -f *Counts*
            mv ${baseexe} oldexe
            pixie -stats dstride oldexe 1>pixie.out 2>pixie.err
            mv oldexe.pixie ${baseexe}

       A training run is carried out (in phase "fdo_runN"), and 
       then this command (in phase "fdo_postN"):

            spike oldexe -fb oldexe -stride_prefetch -o ${baseexe}

 When Spike is used for both Icache and Prefetch improvements, 
 only one spike command is actually issued, with the Icache 
 options followed by the Prefetch options.
 Portability: gcc: -Dalloca=__builtin_alloca; crafty: -DALPHA
 perlbmk: -DSPEC_CPU2000_DUNIX; vortex: -DSPEC_CPU2000_LP64
 Spike, and the Program Analysis Tools, are part of the Developers' 
 Tool Kit Supplement, http://www.tru64unix.compaq.com/dtk/ .  The
 features used in this SPEC submission will be available at the web 
 site as a production release in October, 2001.  The C compiler for 
 this SPEC submission has been available at the same location, as a
 production release, since August, 2001.

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 27-Aug-2002

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