SPEC Seal of Reviewal CFP2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer p5 550 Express (1500 MHz, 4 CPU)
SPECfp_rate2000 = NC
SPECfp_rate_base2000 = NC
SPEC license # 11 Tested by: IBM Test date: Sep-2004 Hardware Avail: Oct-2004 Software Avail: Oct-2004
SPEC has determined that this result was not in compliance with
the SPEC CPU2000 run and reporting rules. Specifically, the
submitter has reported that measurements on a production system
were not, as required by the SPEC CPU2000 Run Rules, within the
1.75% lower bound of the preproduction system.
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
  168.wupwise 8 NCNC 8 NCNC
  171.swim 8 NCNC 8 NCNC
  172.mgrid 8 NCNC 8 NCNC
  173.applu 8 NCNC 8 NCNC
  177.mesa 8 NCNC 8 NCNC
  178.galgel 8 NCNC 8 NCNC
  179.art 8 NCNC 8 NCNC
  183.equake 8 NCNC 8 NCNC
  187.facerec 8 NCNC 8 NCNC
  188.ammp 8 NCNC 8 NCNC
  189.lucas 8 NCNC 8 NCNC
  191.fma3d 8 NCNC 8 NCNC
  200.sixtrack 8 NCNC 8 NCNC
  301.apsi 8 NCNC 8 NCNC
  SPECfp_rate_base2000 NC  
  SPECfp_rate2000 NC

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer p5 550 Express (1500 MHz, 4 CPU)
CPU: POWER5
CPU MHz: 1500
FPU: Integrated
CPU(s) enabled: 4 cores, 2 chips, 2 cores/chip (SMT on)
CPU(s) orderable: 2,4
Parallel: No
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified (on chip)/chip
L3 Cache: 36MB unified (off chip)/DCM, 2 DCM/SUT
Other Cache: None
Memory: 16x2 GB
Disk Subsystem: 2x36GB SCSI, 15K RPM
Other Hardware:
Software
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition V7.0 for AIX
XL Fortran Enterprise Edition V9.1 for AIX
Other Software: IBM ESSL for AIX V4.2
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information
Tested by IBM
  Portability Flags:
    -qfixed used in:        168.wupwise, 171.swim, 172.mgrid, 173.applu,
                            178.galgel, 200.sixtrack, 301.apsi
    -qsuffix=f=f90 used in: 178.galgel, 187.facerec, 189.lucas, 191.fma3d

  Base Optimization Flags:
    C:         -qpdf1/pdf2
               -O5 -blpdata -lmass
    Fortran:   -qpdf1/pdf2
               -O5 -blpdata -lmass

  Peak Optimization Flags:
     168.wupwise:    -O5 -qarch=pwr3 -qtune=pwr3 -blpdata -lmass
                     F77=xlf
     171.swim:       -O5 -qarch=pwr3 -qtune=pwr3 -blpdata -lmass
                     F77=xlf
     172.mgrid:      -qpdf1/pdf2
                     -O5 -blpdata -lmass
     173.applu:      -O5 -qarch=pwr3 -qtune=pwr3 -blpdata -lmass
                     F77=xlf
     177.mesa:       -qpdf1/pdf2
                     -O5
     178.galgel:     -O5 -blpdata -qessl -lessl
     179.art:        basepeak=1
     183.equake:     -qpdf1/pdf2
                     -O5 -blpdata -lmass
     187.facerec:    -qpdf1/pdf2
                     -O5 -blpdata -lmass
     188.ammp:       -qpdf1/pdf2
                     -O5 -blpdata -qalign=natural -D_ILS_MACROS
     189.lucas:      basepeak=1
     191.fma3d:      -qpdf1/pdf2
                     -O5 -blpdata -qalign=natural -qhot=arraypad -Q
     200.sixtrack:   -O3 -qhot -qarch=pwr5 -qtune=pwr5 -qfdpr
                     fdpr -R3
     301.apsi:       -O5 -lmass -qessl -lessl -blpdata -qsave


  SMT:  Acronym for "Simultaneous Multi-Threading". A processor technology that allows
        the simultaneous execution of multiple thread contexts within a single processor
        core. (Enabled by default)
  ESSL: Engineering and Scientific Subroutine Library
  DCM:  Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
  SUT:  Acronym for "System Under Test"

  C:       IBM XL C for AIX invoked as xlc
  Fortran: IBM XL Fortran for AIX invoked as xlf90

  APAR IY 62534 was applied to AIX to enable new hardware support.
  ulimits set to unlimited.
  Large page mode and memory affinity were set as follows:
     vmo -r -o lgpg_regions=800 -o lgpg_size=16777216 -o memory_affinity=1
     chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
     shutdown -r
     export MEMORY_AFFINITY=MCM



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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 19-Oct-2004

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