SPEC® CFP2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C460 M4 (Intel Xeon E7-4880 v2 @
2.50GHz)

CPU2006 license: 9019 Test date: Mar-2014
Test sponsor: Cisco Systems Hardware Availability: Apr-2014
Tested by: Cisco Systems Software Availability: Sep-2013
Benchmark results graph
Hardware
CPU Name: Intel Xeon E7-4880 v2
CPU Characteristics: Intel Turbo Boost Technology up to 3.10 GHz
CPU MHz: 2500
FPU: Integrated
CPU(s) enabled: 60 cores, 4 chips, 15 cores/chip, 2 threads/core
CPU(s) orderable: 1,2,3,4 Chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 37.5 MB I+D on chip per chip
Other Cache: None
Memory: 512 GB (64 x 8 GB 2Rx4 PC3-12800R-11, ECC,
and CL11)
Disk Subsystem: 1 x 300 GB SAS SATA 15K RPM
Other Hardware: None
Software
Operating System: Red Hat Enterprise Linux Server release 6.4
(Santiago)
2.6.32-358.el6.x86_64
Compiler: C/C++: Version 14.0.0.080 of Intel C++ Studio XE
for Linux;
Fortran: Version 14.0.0.080 of Intel Fortran
Studio XE for Linux
Auto Parallel: No
File System: ext4
System State: Run level 3 (multi-user)
Base Pointers: 32/64-bit
Peak Pointers: 32/64-bit
Other Software: None

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves 120 1200 1360 1198 1360 1199 1360 120 1200 1360 1198 1360 1199 1360
416.gamess 120 1326 1770 1324 1770 1328 1770 120 1272 1850 1271 1850 1268 1850
433.milc 120 811 1360 811 1360 811 1360 120 810 1360 810 1360 810 1360
434.zeusmp 120 621 1760 620 1760 620 1760 120 621 1760 620 1760 620 1760
435.gromacs 120 409 2090 412 2080 415 2070 120 404 2120 405 2120 405 2110
436.cactusADM 120 861 1670 862 1660 854 1680 120 861 1670 862 1660 854 1680
437.leslie3d 120 1281 881 1277 883 1281 881 60 568 992 570 990 573 984
444.namd 120 648 1480 664 1450 651 1480 120 650 1480 644 1490 649 1480
447.dealII 120 450 3050 448 3070 449 3060 120 450 3050 448 3070 449 3060
450.soplex 120 1162 861 1163 861 1163 860 60 548 913 548 914 548 913
453.povray 120 262 2440 259 2460 261 2440 120 227 2810 226 2820 227 2810
454.calculix 120 400 2480 399 2480 398 2490 120 400 2480 399 2480 398 2490
459.GemsFDTD 120 1540 827 1541 826 1540 827 120 1540 827 1541 826 1540 827
465.tonto 120 651 1810 651 1810 650 1820 120 626 1880 625 1890 621 1900
470.lbm 120 986 1670 986 1670 986 1670 120 986 1670 986 1670 986 1670
481.wrf 120 845 1590 836 1600 852 1570 120 826 1620 827 1620 827 1620
482.sphinx3 120 1513 1550 1513 1550 1510 1550 120 1538 1520 1541 1520 1544 1520

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

CPU performance set to Enterprise
Power Technology set to Custom
CPU Power State C6 set to Enabled
CPU Power State C1 Enhanced set to Disabled
Package C State Limit set to C0/C1 State
Energy Performance policy set to Performance
Memory RAS configuration set to Maximum Performance
DRAM Clock Throttling Set to Performance
LV DDR Mode set to Performance-mode
DRAM Refresh Rate Set to 1x
 Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6818
 $Rev: 6818 $ $Date:: 2012-07-17 #$ e86d102572650a6e4d596a3cee98f191
 running on SPECCPU-RHEL64 Thu Mar  6 11:10:32 2014

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) CPU E7-4880 v2 @ 2.50GHz
       4 "physical id"s (chips)
       120 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 15
       siblings  : 30
       physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
       physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
       physical 2: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
       physical 3: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
    cache size : 38400 KB

 From /proc/meminfo
    MemTotal:       529134720 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    Red Hat Enterprise Linux Server release 6.4 (Santiago)

 From /etc/*release* /etc/*version*
    redhat-release: Red Hat Enterprise Linux Server release 6.4 (Santiago)
    system-release: Red Hat Enterprise Linux Server release 6.4 (Santiago)
    system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server

 uname -a:
    Linux SPECCPU-RHEL64 2.6.32-358.el6.x86_64 #1 SMP Tue Jan 29 11:47:41 EST
    2013 x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Mar 4 17:17

 SPEC is set to: /opt/cpu2006-1.2
    Filesystem    Type    Size  Used Avail Use% Mounted on
    /dev/sda2     ext4    275G   11G  251G   4% /

 Additional information from dmidecode:
   BIOS Cisco Systems, Inc. C460M4.1.5.5.13.012720142211 01/27/2014
   Memory:
    64x   8 GB
    64x 0xCE00 M393B1K70QB0-YK0 8 GB 1333 MHz 2 rank
    32x NO DIMM NO DIMM

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh"

 Binaries compiled on a system with 1x Core i7-860 CPU + 8GB
 memory using RedHat EL 6.4
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1>       /proc/sys/vm/drop_caches
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Base Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Base Optimization Flags

C benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

C++ benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

Fortran benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch 

Benchmarks using both Fortran and C:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m64 
482.sphinx3:  icc -m32 

C++ benchmarks (except as noted below):

 icpc -m64 
450.soplex:  icpc -m32 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Peak Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

433.milc:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -auto-ilp32 
470.lbm:  basepeak = yes 
482.sphinx3:  -xAVX   -ipo   -O3   -no-prec-div   -opt-mem-layout-trans=3   -unroll2 

C++ benchmarks:

444.namd:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -fno-alias   -auto-ilp32 
447.dealII:  basepeak = yes 
450.soplex:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -opt-malloc-options=3 
453.povray:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -unroll4   -ansi-alias 

Fortran benchmarks:

410.bwaves:  basepeak = yes 
416.gamess:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll2   -inline-level=0   -scalar-rep- 
434.zeusmp:  basepeak = yes 
437.leslie3d:  -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch 
459.GemsFDTD:  basepeak = yes 
465.tonto:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll4   -auto   -inline-calloc   -opt-malloc-options=3 

Benchmarks using both Fortran and C:

435.gromacs:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -opt-prefetch   -auto-ilp32 
436.cactusADM:  basepeak = yes 
454.calculix:  basepeak = yes 
481.wrf:  -xAVX   -ipo   -O3   -no-prec-div   -auto-ilp32 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic14.0-official-linux64.20140128.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20140311.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic14.0-official-linux64.20140128.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20140311.xml.