SPEC® CPU2017 Integer Rate Result

Copyright 2017-2018 Standard Performance Evaluation Corporation

Lenovo Global Technology

ThinkSystem SR650
(1.80 GHz, Intel Xeon Silver 4108)

SPECrate2017_int_base = 66.00

SPECrate2017_int_peak = 70.00

CPU2017 License: 9017 Test Date: Dec-2017
Test Sponsor: Lenovo Global Technology Hardware Availability: Aug-2017
Tested by: Lenovo Global Technology Software Availability: Sep-2017

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Silver 4108
  Max MHz.: 3000
  Nominal: 1800
Enabled: 16 cores, 2 chips, 2 threads/core
Orderable: 1,2 chips
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 1 MB I+D on chip per core
  L3: 11 MB I+D on chip per chip
  Other: None
Memory: 384 GB (24 x 16 GB 2Rx8 PC4-2666V-R, running at
2400)
Storage: 1 x 800 GB SAS SSD
Other: None
Software
OS: SUSE Linux Enterprise Server 12 SP2 (x86_64)
Kernel 4.4.21-69-default
Compiler: C/C++: Version 18.0.0.128 of Intel C/C++
Compiler for Linux;
Fortran: Version 18.0.0.128 of Intel Fortran
Compiler for Linux
Parallel: No
Firmware: Lenovo BIOS Version IVE111C 1.00 released Jul-2017
File System: btrfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 32/64-bit
Other: jemalloc: jemalloc memory allocator library
V5.0.1;
jemalloc: configured and built at default for
32bit (i686) and 64bit (x86_64) targets;
jemalloc: built with the RedHat Enterprise 7.4,
and the system compiler gcc 4.8.5;
jemalloc: sources avilable from jemalloc.net or
releases

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate2017_int_base 66.00
SPECrate2017_int_peak 70.00
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
500.perlbench_r 32 1045 48.8 1060 48.1 1053 48.4 32 841 60.6 840 60.7 840 60.7
502.gcc_r 32 735 61.6 739 61.3 739 61.3 32 638 71.0 640 70.8 639 71.0
505.mcf_r 32 618 83.6 628 82.4 629 82.2 32 627 82.5 618 83.6 631 82.0
520.omnetpp_r 32 916 45.8 926 45.4 924 45.4 32 910 46.2 910 46.1 913 46.0
523.xalancbmk_r 32 467 72.3 468 72.1 469 72.0 32 403 83.8 403 83.9 403 83.8
525.x264_r 32 468 1200 468 1200 466 1200 32 445 1260 450 1250 449 1250
531.deepsjeng_r 32 667 55.0 666 55.1 666 55.1 32 664 55.3 663 55.3 664 55.2
541.leela_r 32 1046 50.7 1048 50.6 1049 50.5 32 1037 51.1 1041 50.9 1043 50.8
548.exchange2_r 32 705 1190 705 1190 706 1190 32 706 1190 707 1190 706 1190
557.xz_r 32 698 49.5 698 49.5 698 49.5 32 698 49.5 699 49.5 732 47.2

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017.1.0.2.ic18.0/lib/ia32:/home/cpu2017.1.0.2.ic18.0/lib/intel64"
LD_LIBRARY_PATH = "$LD_LIBRARY_PATH:/home/cpu2017.1.0.2.ic18.0/je5.0.1-32:/home/cpu2017.1.0.2.ic18.0/je5.0.1-64"
 Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.4
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches
 runcpu command invoked through numactl i.e.:
 numactl --interleave=all runcpu <etc>

Platform Notes

BIOS configuration:
Choose Operating Mode set to Maximum Performance
SNC set to Enable
Hardware Prefetcher set to Disable
MONITORMWAIT set to Enable
Execute Disable Bit set to Disable
Trusted Execution Technology set to Enable
Stale AtoS set to Enable
LLC Deadline Alloc set to Disable
 Sysinfo program /home/cpu2017.1.0.2.ic18.0/bin/sysinfo
 Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f
 running on Cyborg-SPECcpu2006-SUSE12SP2 Sat Dec 23 06:31:35 2017

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Silver 4108 CPU @ 1.80GHz
       2  "physical id"s (chips)
       32 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 8
       siblings  : 16
       physical 0: cores 0 1 2 3 4 5 6 7
       physical 1: cores 0 1 2 3 4 5 6 7

 From lscpu:
      Architecture:          x86_64
      CPU op-mode(s):        32-bit, 64-bit
      Byte Order:            Little Endian
      CPU(s):                32
      On-line CPU(s) list:   0-31
      Thread(s) per core:    2
      Core(s) per socket:    8
      Socket(s):             2
      NUMA node(s):          2
      Vendor ID:             GenuineIntel
      CPU family:            6
      Model:                 85
      Model name:            Intel(R) Xeon(R) Silver 4108 CPU @ 1.80GHz
      Stepping:              4
      CPU MHz:               1795.776
      BogoMIPS:              3591.55
      Virtualization:        VT-x
      L1d cache:             32K
      L1i cache:             32K
      L2 cache:              1024K
      L3 cache:              11264K
      NUMA node0 CPU(s):     0-7,16-23
      NUMA node1 CPU(s):     8-15,24-31
      Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
      aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
      fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes
      xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb pln pts dtherm intel_pt
      tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2
      erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd
      avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc

 /proc/cpuinfo cache data
    cache size : 11264 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 2 nodes (0-1)
   node 0 cpus: 0 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23
   node 0 size: 193111 MB
   node 0 free: 192335 MB
   node 1 cpus: 8 9 10 11 12 13 14 15 24 25 26 27 28 29 30 31
   node 1 size: 193504 MB
   node 1 free: 192761 MB
   node distances:
   node   0   1
     0:  10  21
     1:  21  10

 From /proc/meminfo
    MemTotal:       395894464 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux Cyborg-SPECcpu2006-SUSE12SP2 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC
    2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Dec 23 06:30

 SPEC is set to: /home/cpu2017.1.0.2.ic18.0
    Filesystem     Type   Size  Used Avail Use% Mounted on
    /dev/sdb2      btrfs  744G  174G  570G  24% /home

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   BIOS Lenovo -[IVE111C-1.00]- 07/17/2017
   Memory:
    24x Samsung M393A2K43BB1-CTD 16 GB 2 rank 2666, configured at 2400

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
 CC  500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base, peak)
      525.x264_r(base, peak) 557.xz_r(base, peak)
------------------------------------------------------------------------------
icc (ICC) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CC   500.perlbench_r(peak) 502.gcc_r(peak)
------------------------------------------------------------------------------
icc (ICC) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base)
      541.leela_r(base)
------------------------------------------------------------------------------
icpc (ICC) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak)
     541.leela_r(peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  548.exchange2_r(base, peak)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Fortran benchmarks:

 ifort 

Base Portability Flags

500.perlbench_r:  -DSPEC_LP64   -DSPEC_LINUX_X64 
502.gcc_r:  -DSPEC_LP64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -DSPEC_LP64   -DSPEC_LINUX 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

C++ benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Fortran benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs   -align array32byte   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Base Other Flags

C benchmarks:

 -m64   -std=c11 

C++ benchmarks:

 -m64 

Fortran benchmarks:

 -m64 

Peak Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Fortran benchmarks:

 ifort 

Peak Portability Flags

500.perlbench_r:  -DSPEC_LP64   -DSPEC_LINUX_X64 
502.gcc_r:  -D_FILE_OFFSET_BITS=64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -D_FILE_OFFSET_BITS=64   -DSPEC_LINUX 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Peak Optimization Flags

C benchmarks:

500.perlbench_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -fno-strict-overflow   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
502.gcc_r:  -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32   -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-32/lib   -ljemalloc 
505.mcf_r:  -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
525.x264_r:  -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -fno-alias   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
557.xz_r:  Same as 505.mcf_r 

C++ benchmarks:

520.omnetpp_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
523.xalancbmk_r:  -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32   -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-32/lib   -ljemalloc 
531.deepsjeng_r:  Same as 520.omnetpp_r 
541.leela_r:  Same as 520.omnetpp_r 

Fortran benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs   -align array32byte   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Peak Other Flags

C benchmarks (except as noted below):

 -m64   -std=c11 
502.gcc_r:  -m32   -std=c11 

C++ benchmarks (except as noted below):

 -m64 
523.xalancbmk_r:  -m32 

Fortran benchmarks:

 -m64 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.html,
http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-SKL-A.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.xml,
http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-SKL-A.xml.