SPECfp95

Sun Microsystems

Ultra 5 Model 400

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SPECfp95 21.9
SPECfp_base95 18.6

Benchmark # and Name Reference Time Base Run Time Base SPEC Ratio Peak Run Time Peak SPEC Ratio
101.tomcatv 370015424.012928.6
102.swim 860025334.022937.6
103.su2cor 140010813.010812.9
104.hydro2d 24002688.952928.21
107.mgrid 250014317.414317.5
110.applu 220021910.110820.4
125.turb3d 410024117.023817.2
141.apsi 210074.828.16432.8
145.fpppp 960041023.425937.0
146.wave5 300011326.69930.2
SPECfp_base95 18.6
SPECfp95 21.9

Tester Information:
SPEC License #: 6
Tested By: Sun, Palo Alto
Test Date: Mar-2000
Hardware Avail: Mar-2000
Software Avail: May-2000

Hardware Information:
Model Name: Ultra 5 Model 400
CPU: 400 MHz UltraSPARC-IIi
FPU: Integrated
Number of CPU(s): 1
Primary Cache: 16KBI+16KBD on chip
Secondary Cache: 2MB(I+D) off chip
Other Cache: None
Memory: 512MB
Disk Subsystem: 2 x 9.1GB 7200-rpm
Other Hardware: Fast Ethernet
System clock frequency: 100 MHz

Software Information:
Operating System: Solaris 8
Compiler: Sun WorkShop F77 6.0
File System: UFS
System State: Single User
Kernel Extensions:

Notes:

P1= -xprofile=collect:`pwd`/../feedback; P2= 
`pwd`/../feedback; FOPTION= -fast -xarch=v8plusa -s
BCOPY = -Qoption iropt -O4+bcopy; INV = -Qoption iropt -O4+invccexp; 
Baseline: -fast  -xarch=v8plusa -xprefetch
Baseline:  PASS1= ${P1}; PASS2= ${P2}
101.tomcatv: -fast -xchip=ultra2 -xarch=v8plusa -xpad=local:23 ${PF} 
102.swim:    -fast -xchip=ultra2 -xarch=v8plusa -xpad=common:15 ${PF}   
103.su2cor:  -fast -xchip=ultra2 -xarch=v8plusa -Qoption cg 
103.su2cor:  PASS1= -xO4 ${P1}; PASS2= ${P2}; EXTRA_LIBS= -lmvec
104.hydro2d: ${FOPTION} -xprefetch -Qoption iropt -O4+pde -fsimple=2
104.hydro2d: PASS1= ${P1}; PASS2= ${P2}
107.mgrid: -fast -xchip=ultra2 -xarch=v8plusa ${PF}  -fsimple=2 
110.applu: -fast -xchip=ultra2 -xarch=v8plusa -Qoption iropt 
125.turb3d:  -fast -xchip=ultra2 -xarch=v8plusa ${PF} -stackvar -xpad 
141.apsi:    -fast -xchip=ultra2 -xarch=v8plusa -stackvar -fsimple=2 
141.apsi (cont):    -O4+invccexp+algassoc+bmerge+ipa,-Si36
145.fpppp:   -fast -xchip=ultra2 -xarch=v8plusa -xO5 -xsafe=mem 
145.fpppp (cont):   -Qoption iropt -reroll=1  -Qoption cg -Qms_pipe-off
145.fpppp:   PASS1= ${P1}; PASS2= ${P2}
146.wave5:   ${FOPTION} -stackvar -fsimple=2 -Qoption iropt -O4+unroll 
Config file: u5_us2i_400.cfg


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First published at SPEC.org on 11-Apr-2000


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