SPEC® MPIL2007 Result

Copyright 2006-2010 Standard Performance Evaluation Corporation

Supermicro

Hyper A+ Server AS -2126HS-TN (AMD EPYC 9755)

MPI2007 license: 6569 Test date: Sep-2024
Test sponsor: Supermicro Hardware Availability: Oct-2024
Tested by: Supermicro Software Availability: Apr-2024
Benchmark results graph

Results Table

Benchmark Base Peak
Ranks Seconds Ratio Seconds Ratio Seconds Ratio Ranks Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
121.pop2 256 175   22.2 175   22.2 175   22.2 256 175   22.2 175   22.2 175   22.2
122.tachyon 256 135   14.4 139   14.0 139   14.0 256 135   14.4 139   14.0 139   14.0
125.RAxML 256 229   12.7 233   12.5 235   12.4 256 229   12.7 233   12.5 235   12.4
126.lammps 256 157   15.7 157   15.7 157   15.7 256 157   15.7 157   15.7 157   15.7
128.GAPgeofem 256 176   33.7 176   33.7 176   33.7 256 176   33.7 176   33.7 176   33.7
129.tera_tf 256 69.9 15.7 69.9 15.7 69.8 15.7 256 69.9 15.7 69.9 15.7 69.8 15.7
132.zeusmp2 256 132   16.1 132   16.1 133   16.0 256 132   16.1 132   16.1 133   16.0
137.lu 256 109   38.6 109   38.5 109   38.5 256 109   38.6 109   38.5 109   38.5
142.dmilc 256 148   24.9 147   25.1 147   25.0 256 148   24.9 147   25.1 147   25.0
143.dleslie 256 64.6 48.0 64.7 47.9 65.4 47.4 256 64.6 48.0 64.7 47.9 65.4 47.4
145.lGemsFDTD 256 298   14.8 298   14.8 299   14.7 256 298   14.8 298   14.8 299   14.7
147.l2wrf2 256 472   17.4 470   17.4 473   17.4 256 472   17.4 470   17.4 473   17.4
Hardware Summary
Type of System: Homogeneous
Compute Node: Hyper A+ Server AS -2126HS-TN
Total Compute Nodes: 1
Total Chips: 2
Total Cores: 256
Total Threads: 256
Total Memory: 1536 GB
Base Ranks Run: 256
Minimum Peak Ranks: 256
Maximum Peak Ranks: 256
Software Summary
C Compiler: Intel oneAPI DPC++/C++ Compiler 2024.2.1
C++ Compiler: Intel oneAPI DPC++/C++ Compiler 2024.2.1
Fortran Compiler: Intel oneAPI DPC++/C++ Compiler 2024.2.1
Base Pointers: 64-bit
Peak Pointers: 64-bit
MPI Library: Intel MPI Version 2021.13
Other MPI Info: None
Pre-processors: No
Other Software: Jemalloc-5.3.0

Node Description: Hyper A+ Server AS -2126HS-TN

Hardware
Number of nodes: 1
Uses of the node: compute
Vendor: Supermicro
Model: Hyper A+ Server AS -2126HS-TN
CPU Name: AMD EPYC 9755
CPU(s) orderable: 1,2 chips
Chips enabled: 2
Cores enabled: 256
Cores per chip: 128
Threads per core: 1
CPU Characteristics: Max. Boost Clock upto 4.1GHz
CPU MHz: 2700
Primary Cache: 32 KB I + 48 KB D on chip per core
Secondary Cache: 1 MB I+D on chip per core
L3 Cache: 512 MB I+D on chip per chip,
32 MB shared / 8 cores
Other Cache: None
Memory: 1536 GB (24 x 64 GB 2Rx4 PC5-6400B-R,
running at 6000)
Disk Subsystem: 1 x 3.5 TB NVMe SSD
Other Hardware: None
Adapter: None
Number of Adapters: 1
Slot Type: None
Data Rate: None
Ports Used: 0
Interconnect Type: None
Software
Adapter: None
Adapter Driver: None
Adapter Firmware: None
Operating System: Ubuntu 24.04 LTS
6.8.0-44-generic
Local File System: ext4
Shared File System: None
System State: Multi-user, run level 3
Other Software: None

Submit Notes

The config file option 'submit' was used.
mpiexec.hydra -bootstrap ssh -hosts localhost -genv I_MPI_COMPATIBILITY=3 -np $ranks -ppn $ranks $command

General Notes

 MPI startup command:
   mpiexec.hydra command was used to start MPI jobs.
 RAM configuration:
   Compute nodes have 1 x 64 GB RDIMM on each memory channel.
 BIOS settings:
   SMT = Disabled
   NUMA nodes per socket = NPS4
   ACPI SRAT L3 Cache as NUMA Domain = Enabled
   Determinism Control = Manual
   Determinism Enable = Power
   xGMI Link Configuration = 4 xGMI Links
   4 Link xGMI max speed = 32Gbps
   TDP Control = Manual
   TDP = 500
   Package Power Limit Control = Manual
   Package Power Limit = 500
 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.

Base Compiler Invocation

C benchmarks:

 mpiicc -cc=icx 

C++ benchmarks:

126.lammps:  mpiicpc -cxx=icpx 

Fortran benchmarks:

 mpiifort -fc=ifx 

Benchmarks using both Fortran and C:

 mpiicc -cc=icx   mpiifort -fc=ifx 

Base Portability Flags

121.pop2:  -DSPEC_MPI_CASE_FLAG   -DSPEC_MPI_LP64 
122.tachyon:  -DSPEC_MPI_LP64 
125.RAxML:  -DSPEC_MPI_LP64 
126.lammps:  -DMPICH_IGNORE_CXX_SEEK 
128.GAPgeofem:  -DSPEC_MPI_LP64 
132.zeusmp2:  -DSPEC_MPI_LP64 
142.dmilc:  -DSPEC_MPI_LP64 
147.l2wrf2:  -DSPEC_MPI_LP64 

Base Optimization Flags

C benchmarks:

 -Ofast   -ipo   -march=skylake-avx512   -mtune=skylake-avx512   -ansi-alias 

C++ benchmarks:

126.lammps:  -Ofast   -ipo   -march=skylake-avx512   -mtune=skylake-avx512   -ansi-alias 

Fortran benchmarks:

 -Ofast   -ipo   -march=skylake-avx512   -mtune=skylake-avx512   -nostandard-realloc-lhs   -align array64byte 

Benchmarks using both Fortran and C:

 -Ofast   -ipo   -march=skylake-avx512   -mtune=skylake-avx512   -ansi-alias   -nostandard-realloc-lhs   -align array64byte 

Base Other Flags

C benchmarks (except as noted below):

 -limf   -Wl,--rpath=/usr/local/lib -ljemalloc 
142.dmilc:  -Wno-implicit-function-declaration -Wno-implicit-int   -limf   -Wl,--rpath=/usr/local/lib -ljemalloc 

C++ benchmarks:

126.lammps:  -Wno-register   -limf   -Wl,--rpath=/usr/local/lib -ljemalloc 

Fortran benchmarks:

 -limf   -Wl,--rpath=/usr/local/lib -ljemalloc 

Benchmarks using both Fortran and C:

121.pop2:  -limf   -Wl,--rpath=/usr/local/lib -ljemalloc 
128.GAPgeofem:  -Wno-implicit-function-declaration -Wno-implicit-int   -limf   -Wl,--rpath=/usr/local/lib -ljemalloc 
132.zeusmp2:  -Wno-implicit-function-declaration   -limf   -Wl,--rpath=/usr/local/lib -ljemalloc 
147.l2wrf2:  -Wno-implicit-function-declaration -Wno-implicit-int -Wl,-z,muldefs   -Wl,-z,muldefs   -limf   -Wl,--rpath=/usr/local/lib -ljemalloc 

Peak Optimization Flags

C benchmarks:

122.tachyon:  basepeak = yes 
125.RAxML:  basepeak = yes 
142.dmilc:  basepeak = yes 

C++ benchmarks:

126.lammps:  basepeak = yes 

Fortran benchmarks:

129.tera_tf:  basepeak = yes 
137.lu:  basepeak = yes 
143.dleslie:  basepeak = yes 
145.lGemsFDTD:  basepeak = yes 

Benchmarks using both Fortran and C:

121.pop2:  basepeak = yes 
128.GAPgeofem:  basepeak = yes 
132.zeusmp2:  basepeak = yes 
147.l2wrf2:  basepeak = yes 

The flags file that was used to format this result can be browsed at
http://www.spec.org/mpi2007/flags/Intel_compiler_flags_hpc.2024.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/mpi2007/flags/Intel_compiler_flags_hpc.2024.xml.